DZD450型真空包裝機(jī)設(shè)計(jì)含8張CAD圖
DZD450型真空包裝機(jī)設(shè)計(jì)含8張CAD圖,dzd450,真空,裝機(jī),設(shè)計(jì),cad
任務(wù)書
XX 學(xué)院
XXXX專業(yè)
論文題目 DZD450型真空包裝機(jī)設(shè)計(jì)
學(xué)生姓名 XX 學(xué) 號(hào) XX
起訖日期 20XX.2.20-2012.6.8
指導(dǎo)教師姓名(簽名)
指導(dǎo)教師職稱 XX
指導(dǎo)教師工作單位 XXXXXXXXXXXX
院(系)領(lǐng)導(dǎo)簽名
下發(fā)任務(wù)書日期 : 20XX年2月 20日
題 目
DZD450型真空包裝機(jī)設(shè)計(jì)
論文時(shí)間
20XX年2月20日至 20XX年6月1日
課題的主要內(nèi)容及要求(含技術(shù)要求、圖表要求等)
根據(jù)以下參數(shù)
1. 熱封條數(shù):兩條
2. 真空室絕對(duì)壓強(qiáng):≤ 1.332KPa
3. 最大封口有效尺寸(長(zhǎng)×寬) mm:450×10
4. 加熱溫度調(diào)節(jié)范圍(℃) :90~240
5. 加熱為時(shí)間調(diào)節(jié)范圍(S) :1~10
6. 包裝能力(次/小時(shí)):180~250
7. 電源(三相四線制):380V/50Hz
8. 額定功率(KW):1.3
9. 控制特征:人工上袋自動(dòng)控制
設(shè)計(jì)一種真空包裝機(jī),完成總裝圖及零件。編寫設(shè)計(jì)說(shuō)明書;完成專業(yè)外文資料翻譯1份。
課題的實(shí)施的方法、步驟及工作量要求
設(shè)計(jì)方法:學(xué)生在指導(dǎo)教師的指導(dǎo)下,利用所學(xué)的課程并自學(xué)有關(guān)知識(shí),掌握機(jī)械設(shè)計(jì)的特點(diǎn)、方法,借助《機(jī)械設(shè)計(jì)手冊(cè)》等技術(shù)資料,完成本機(jī)設(shè)計(jì)。
設(shè)計(jì)步驟:調(diào)研收集設(shè)計(jì)資料——根據(jù)所給定的參數(shù)制定總體設(shè)計(jì)方案——完成總裝圖及部裝圖——完成零件圖——編寫設(shè)計(jì)說(shuō)明書。
工作量要求:設(shè)計(jì)圖紙工作量合計(jì)3張零號(hào)圖紙(A0-2,A1-0,A2-1,A3-1,A4-13);畢業(yè)設(shè)計(jì)說(shuō)明書不少于8000漢字;外文資料原文(與課題相關(guān)的1萬(wàn)印刷符號(hào)左右),外文資料翻譯譯文(約3000漢字)。
指定參考文獻(xiàn)
[1]屈能勝.我國(guó)食品包裝機(jī)械發(fā)展綜述[M].輕工機(jī)械,2005.02
[2]金國(guó)斌.現(xiàn)在包裝技術(shù)[M].上海:上海大學(xué)出版社,20001.4
[3]錢俊,余洗,劉冬林.特種包裝技術(shù)[M].北京:化學(xué)工業(yè)出版社。2003.11
[4]徐灝等.機(jī)械設(shè)計(jì)手冊(cè)[M].北京:機(jī)械工業(yè)出版社,1991
[5]文耀平.真空包裝機(jī)加熱封口變壓器設(shè)計(jì)計(jì)算方法[J].設(shè)計(jì)探討,1994
[6]王朝文.電熱電器的設(shè)計(jì)制造與使用維修[J],北京:機(jī)械工業(yè)出版社,1987
[7]習(xí)培松.張道林,四連桿真空包裝機(jī)幾何參數(shù)的計(jì)算[J].農(nóng)機(jī)與食品機(jī)械,1998
[8]王萍.真空包裝機(jī)氣路系統(tǒng)設(shè)計(jì)原理[J].包裝與食品機(jī)械,1998
[9]甘永利.幾何公差與檢測(cè)[M].上海:上海工業(yè)出版社,2004
[10]成大先.機(jī)械設(shè)計(jì)手冊(cè)(第七卷)[M].北京:化學(xué)工業(yè)出版社,2002
[11]濮良貴,紀(jì)名剛主編.機(jī)械設(shè)計(jì)(第七版)[M].北京:高等教育出版社,2001
畢業(yè)設(shè)計(jì)(論文)進(jìn)度計(jì)劃(以周為單位)
第 1 周(2012年 2月20日----2012年 2 月 26 日):
下達(dá)設(shè)計(jì)任務(wù)書,明確任務(wù),熟悉課題,收集資料,上交外文翻譯、參考文獻(xiàn)和開(kāi)題報(bào)告。
第2周——第8周(2012年 2 月 27 日----2012年4 月 15 日):
制定總體方案,繪制總裝圖草圖。
第 9 周——第14周(2012年4月16 日----2012年 5月 27日):
修改并完成總裝圖及部裝圖,完成有關(guān)零件圖的設(shè)計(jì)。
第15 周——第 16 周(2012年 5 月28日----2012年 6 月5 日):
編寫設(shè)計(jì)說(shuō)明書
第 16 周(2012年 6月 6日----2012年6 月 8 日):
準(zhǔn)備答辯
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開(kāi)題報(bào)告
題 目
DZD450型真空包裝機(jī)設(shè)計(jì)
學(xué)生姓名、學(xué)號(hào)
沈揚(yáng) B08152067
專業(yè)
機(jī)械設(shè)計(jì)制造及其自動(dòng)化(數(shù)控技術(shù))
指導(dǎo)教師姓名
龐偉
職稱
副教授
一.課題背景和意義
包裝為在流通過(guò)程中保護(hù)產(chǎn)品,方便儲(chǔ)運(yùn),促進(jìn)銷售,按一定的技術(shù)方法所用的容器、材料和輔助物等的總體名稱;也指為達(dá)到_卜述目的在采用容器,材料一和輔助物的過(guò)程中施加一定技術(shù)方法等的操作活功。一件產(chǎn)品一般要以商品的形式經(jīng)過(guò)流通后完好無(wú)損且保質(zhì)保量地到達(dá)顧客手中,才能體現(xiàn)共功能價(jià)值和經(jīng)濟(jì)價(jià)值。沒(méi)有包裝的產(chǎn)品難以儲(chǔ)存,運(yùn)輸和銷售。包裝是隨著人類經(jīng)濟(jì)活功的發(fā)展而發(fā)展的。在當(dāng)前社會(huì),需要包裝的物品種類己經(jīng)越來(lái)越多,同時(shí)對(duì)包裝機(jī)械的要求也越來(lái)越高。高精度,高質(zhì)量,高效率的包裝機(jī)往往能大幅度地增加一個(gè)企業(yè)的市場(chǎng)競(jìng)爭(zhēng)力。包裝機(jī)的引入甚至可以改變一個(gè)行業(yè)的生存面貌。中國(guó)白改革開(kāi)放以來(lái),包裝機(jī)械行業(yè)得到了允分的發(fā)展,取得的成就也很人,然而因?yàn)槠鸩酵?,?duì)比國(guó)外先進(jìn)包裝機(jī)械仍有小小差距,所以在技術(shù)領(lǐng)域仍然有廣闊的提升空間二這就需要我們對(duì)包裝機(jī)械行業(yè)給一子足夠的重視和支持?;诖耍覀兺ㄟ^(guò)劉一本課題的不斷深入研究,能夠在鞏固和鍛煉自身專業(yè)技能,熟練運(yùn)用所學(xué)知識(shí)完成課題的同時(shí),也要對(duì)包裝機(jī)械行業(yè)從分類與結(jié)構(gòu)組成到它未來(lái)的發(fā)展趨勢(shì)有一個(gè)全局的了解。
當(dāng)世界各國(guó)都規(guī)定肉制品不能使用硝酸鹽和亞硝酸鹽作為防腐劑后,真空包裝得到迅速的推廣應(yīng)用。使用產(chǎn)品范圍很廣,如火腿、香腸、魚糕、咸菜、調(diào)味魚塊、鮮肉、冷凍牛排、可蒸煮袋熟肉制品、烘烤食品、果品、土特產(chǎn)品、藥材等;后來(lái)推廣到醫(yī)療器械、藥品的無(wú)菌包裝、化學(xué)品、精密儀器、服裝、五金產(chǎn)品、電子元件、軍工產(chǎn)品等各種固體、粉末裝物體、液體、固液混合體包裝。
隨著我國(guó)經(jīng)濟(jì)的日益發(fā)展壯大,包裝工業(yè)也以年均18%的速度快速發(fā)展,但與發(fā)達(dá)國(guó)家相比,無(wú)論在產(chǎn)品品種、技術(shù)水平和產(chǎn)品質(zhì)量方面都有很大差距。在我國(guó)包裝工業(yè)快速發(fā)展的進(jìn)程中,大量技術(shù)含量高的成套設(shè)備仍依靠進(jìn)日。我國(guó)包裝機(jī)械對(duì)國(guó)外高端技術(shù)的過(guò)度依賴,己成為嚴(yán)重制約我國(guó)包裝工業(yè)持續(xù)、穩(wěn)定發(fā)展的隱憂。鑒于以上原因,且包裝行業(yè)又屬于配套行業(yè),涉及國(guó)民經(jīng)濟(jì)的許多領(lǐng)域,特別是食品行業(yè)與飲料行業(yè),更是有賴于包裝行業(yè)的技術(shù)進(jìn)步、配套服務(wù),因此,我們不能再忽視包裝機(jī)械落后狀況對(duì)我國(guó)包裝行業(yè)整體發(fā)展的負(fù)面影響。
真空包裝機(jī)是將包裝袋內(nèi)抽成低真空后,當(dāng)即自動(dòng)封口。由于袋內(nèi)的真空度高,殘留的空氣少,可抑制細(xì)菌等微生物的繁殖,能夠延長(zhǎng)儲(chǔ)存期,防止食品腐敗。對(duì)某些松軟的食物,經(jīng)過(guò)真空包裝后可縮小體積。從而可使包裝物品達(dá)到“四防、兩省、一保質(zhì)”的特點(diǎn):即防潮、防霉、防污染、防氧化、省容積、省運(yùn)費(fèi)、延長(zhǎng)儲(chǔ)存期。食品包裝中肉類是最適合真空包裝的。采用高度防透氧的薄膜—聚偏乙烯、聚酞胺、聚醋、涂以丙烯晴作為真空包裝材料,可使鮮肉在包裝內(nèi)處于無(wú)菌狀態(tài),使其貨架壽命延長(zhǎng)1倍。各種塑料復(fù)合薄膜袋或鋁箔復(fù)合薄膜袋等復(fù)合材料也適用于真空包裝。
真空包裝機(jī)是用于包裝產(chǎn)品,使產(chǎn)品增長(zhǎng)其保質(zhì)期,增加產(chǎn)品美觀度的一種機(jī)械。真空包裝技術(shù)可以提高商品的使用價(jià)值,防腐、防潮、防銹蝕,減少損耗,節(jié)約貯運(yùn)費(fèi)用,有利于健康。真空包裝技術(shù)廣泛用于食品、藥品、電子儀器、精密儀表、化工產(chǎn)品等行業(yè)。人們膳食結(jié)構(gòu)的調(diào)整和飲食習(xí)慣的改變,我國(guó)經(jīng)濟(jì)持續(xù)發(fā)展,促使了食品加工的快速發(fā)展,增加了高品質(zhì)的包裝機(jī)械和食品加工機(jī)械的需求。真空包裝己經(jīng)廣泛的推廣使用。低成本、智能化、高品質(zhì)是食品包裝機(jī)械的發(fā)展趨勢(shì)。
一臺(tái)雙室機(jī)可相當(dāng)于兩臺(tái)單室機(jī),但較兩臺(tái)單室機(jī)小,重量輕,可輪番作業(yè),使準(zhǔn)備工作與包裝時(shí)間重合,因此較單室的工作效率較高,雖工作周期不變,但是排放包裝件的時(shí)間與自動(dòng)循環(huán)時(shí)間重合,效率可提高,成為真空包裝機(jī)的又一主導(dǎo)產(chǎn)品。目前國(guó)內(nèi)現(xiàn)有的設(shè)備存在嚴(yán)重的缺陷,例如:封口性能不好、真空室密封不好、包裝袋的真空度不高、四連桿帶動(dòng)上箱室的運(yùn)動(dòng)不平穩(wěn)、部件間連接不好、機(jī)構(gòu)不可靠等缺陷,達(dá)不到理想的生產(chǎn)狀態(tài)。鑒于這種情況,參考了一些相關(guān)的科技資料,在現(xiàn)有的設(shè)備的基礎(chǔ)上,本次畢業(yè)設(shè)計(jì)對(duì)一種現(xiàn)有單蓋雙工位真空包裝機(jī)進(jìn)行了改進(jìn)設(shè)計(jì)。單蓋雙工位真空包裝機(jī)的關(guān)鍵設(shè)備是熱合部件和四連桿機(jī)構(gòu),它們決定了包裝袋的封口性能。因此這里所作的改進(jìn)也是主要針對(duì)這兩部分進(jìn)行的。
本課題將根據(jù)包裝機(jī)的功能要求和工藝分析,參考相關(guān)的資料,分析目前真空包裝設(shè)備的不足,對(duì)現(xiàn)有的單蓋雙工位真空包裝機(jī)進(jìn)行了改進(jìn)設(shè)計(jì)。主要的改進(jìn)如下:重新選用了熱封變壓器,提高了封口質(zhì)量;對(duì)上工作室的密封槽、密封條進(jìn)行了重新設(shè)計(jì),改善了真空室的密封性;對(duì)四連桿機(jī)構(gòu)進(jìn)行重新設(shè)計(jì),改善了上真空室運(yùn)動(dòng)的平穩(wěn)性和靈活性。確定運(yùn)動(dòng)原理圖,機(jī)械系統(tǒng)示意圖,初定真空包裝機(jī)的結(jié)構(gòu)形式。重點(diǎn)包括真空包裝機(jī)包裝帶供送機(jī)構(gòu)設(shè)計(jì),部件結(jié)構(gòu)合理性分析和設(shè)計(jì)計(jì)算。主要零件的結(jié)構(gòu)分析、材料選擇、公差配合選擇及技術(shù)要求說(shuō)明。
由于實(shí)踐經(jīng)驗(yàn)的欠缺和知識(shí)的局限性,該設(shè)備的實(shí)際工作情況及可用性還有待于實(shí)踐的檢驗(yàn)
二.文獻(xiàn)綜述
課題依據(jù)
1、 熱封條數(shù):兩條
2、 真空室絕對(duì)壓強(qiáng):<1.332Kpa
3、 最大封口有效尺寸(長(zhǎng)*寬)mm:450*10
4、 最大封口有效范圍(℃):90~240
5、 加熱時(shí)間調(diào)節(jié)范圍(S):1~10
6、 包裝能力(次/小時(shí)):180~250
7、 電源(三相四線制):380V/50Hz
8、 額定功率(KW):1.3
9、 控制特征:人工上袋自動(dòng)控制
設(shè)計(jì)方法:
學(xué)生在指導(dǎo)教師的指導(dǎo)下,利用所學(xué)的課程并自學(xué)有關(guān)知識(shí),掌握機(jī)械設(shè)計(jì)的特點(diǎn)、方法,借助《機(jī)械設(shè)計(jì)手冊(cè)》等技術(shù)資料,完成本機(jī)設(shè)計(jì)。
設(shè)計(jì)步驟:
調(diào)研收集設(shè)計(jì)資料——根據(jù)所給定的參數(shù)制定總體設(shè)計(jì)方案——完成總裝圖及部裝圖——完成零件圖——編寫設(shè)計(jì)說(shuō)明書。
工作量要求:
設(shè)計(jì)圖紙工作量合計(jì)3張零號(hào)圖紙(A0-2張,A1-2張,A2-0張,A3-0張,A4-0張,電子手繪-若干);畢業(yè)設(shè)計(jì)說(shuō)明書不少于8000漢字;外文資料原文(與課題相關(guān)的1萬(wàn)印刷符號(hào)左右),外文資料翻譯譯文(約3000漢字)。
三.參考文獻(xiàn)
[1]屈能勝.我國(guó)食品包裝機(jī)械發(fā)展綜述[M].輕工機(jī)械,2005.02
[2]金國(guó)斌.現(xiàn)在包裝技術(shù)[M].上海:上海大學(xué)出版社,20001.4
[3]錢俊,余洗,劉冬林.特種包裝技術(shù)[M].北京:化學(xué)工業(yè)出版社.2003.11
[4]徐灝等.機(jī)械設(shè)計(jì)手冊(cè)[M].北京:機(jī)械工業(yè)出版社,1991
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Stresa, Italy, 25-27 April 2007 0-LEVEL VACUUM PACKAGING RT PROCESS FOR MEMS RESONATORS Nicolas Abelé1,3, Daniel Grogg1, Cyrille Hibert2, Fabrice Casset4, Pascal Ancey3, Adrian M. Ionescu1 1LEG, Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland, 2CMI (EPFL), 3ST Microelectronics, France, 4CEA-LETI MINATEC, France ABSTRACT A new Room Temperature (RT) 0-level vacuum package is demonstrated in this work, using amorphous silicon (aSi) as sacrificial layer and SiO2 as structural layer. The process is compatible with most of MEMS resonators and Resonant Suspended-Gate MOSFET [1] fabrication processes. This paper presents a study on the influence of releasing hole dimensions on the releasing time and hole clogging. It discusses mass production compatibility in terms of packaging stress during back-end plastic injection process. The packaging is done at room temperature making it fully compatible with IC-processed wafers and avoiding any subsequent degradation of the active devices. 1. INTRODUCTION MEMS resonators performances have been demonstrated to satisfy requirements for CMOS co-integrated reference oscillator applications [2-3]. Different packaging possibilities were proposed in previous years using either a 0-level approaches [4, 5] or wafer bonding approaches [6]. According to industry requirements, 0-level thin film packaging using standard front-end manufacturing processes is however likely to be the most cost-efficient technique to achieve vacuum encapsulation of MEMS components for volume production. 2. DEVICE DESCRIPTION AND PACKAGING DESIGN The packaging process has been done on a MEMS resonator having MOSFET detection [1]. The device is based on a suspended-gate resonating over a MOSFET channel which modulates the drain current. The advantage of this technique is the much larger the output detection current than for the usual capacitive detection type, due to the intrinsic gain of the transistor. The RSG-MOSFET device fabrication process and performances were previously described in [7]. The process steps are presented in Fig. 1, where a 5μm thick amorphous silicon (aSi) layer is sputtered on the already released MEMS resonator followed by a 2μm RF sputtered SiO2 film deposition. A quasi-zero stress aSi film deposition process has been developed; the quasi- vertical deposition avoids depositing material under the beam lowering the releasing time. Releasing holes of 1.5μm were etched through the SiO2 layer and the releasing step is done by dry SF6 plasma. Due to pure chemical etching, high selectivity of less than 1nm/min on SiO2 was obtained. The holes were clogged by a non- conformal sputters SiO2 deposition at room temperature. Fig. 1 Schematic of the 0-level vacuum package fabrication process of a RSG-MOSFET Packaging process has been performed on the metal-gate SG-MOSFET and Fig. 2a shows an SEM picture of a released AlSi-based RSG-MOSFET with a 500nm air- gap, a beam length and width of respectively 12.5μm and 6μm with a 40nm gate oxide. A vacuum packaged RSG- MOSFET is shown in Fig. 2b highlighting the strong bonds of the re-filled releasing hole after clogging. Cross section of a releasing hole in Fig. 2c shows more than 1μm bonding surface to ensure cavity sealing. A FIB cross section in Fig. 2d shows the suspended SiO2 ?EDA Publishing/DTIP 2007 ISBN: 978-2-35500-000-3 Nicolas Abelé, Daniel Grogg, Cyrille Hibert, Fabrice Casset, Pascal Ancey, Adrian M. Ionescu 0-LEVEL VACUUM PACKAGING RT PROCESS FOR MEMS RESONATORS membrane above the suspended-gate. The vacuum atmosphere inside the cavity is obtained by depositing the top SiO2 layer under 5x10-7mBar given by the equipment. Suspended- Gate Drain Source Bulk contact a) 10 μm Drain Source Suspended- Gate 6μm 1μm b) SiO2 c) 1μm Hole diameter 1.5μm Vacuumed cavity 1um SiO2 d) Drain Suspended- Gate 50μm Fig. 2 SEM pictures of a) AlSi-based RSG-MOSFET, b) Top view of a SiO2 cap covering the RSG-MOSFET, c) Cross section of releasing holes filled with sputtered SiO2, d) FIB cross section of the packaged RSG- MOSFET, material re-deposited during the FIB cut is surrounding the suspended-gate and the SiO2 membrane. The slightly compressive SiO2 membranes show very good behavior for the thin film packaging, as seen in Fig.3 where cavities were formed on large opening size. During the clogging process, due to the highly non- conformal deposition, the amount of material entering in the cavity has been measured to be only 80nm compared to the 2.5μm oxide deposited. Residues inside the cavity are confined in an 8-to-10μm diameter circle, but strongly depend on the topology inside the cavity. The oxide thickness needed to clog the holes strongly depends on the hole width-over-height ratio, which therefore determines the amount of residues in the cavity. 40μm SuspendedSiO2 membranes a) 2μm 1.1μm aSi0.5μm wet oxide 4.5μm sputtered SiO2 b) Fig. 3 a-b)Cross section of a 2um SiO2 suspended membrane having a releasing hole clogged by a 2.5μm SiO2 sputtering deposition 3. EFFECT OF OPENING SIZE ON RELEASING RATE AND CLOGGING EFFECT Etching rate variation on aSi related to the hole opening size and the aSi thickness is shown in Fig. 4. Small holes openings decrease the etching rate. A dual underetching behavior due to aSi thickness variation and holes diameters is observed after a 2 min. release step: for a small hole aperture (2μm diameter), exposed surface factor is dominant and etching rate is 3 times greater for the thin aSi. However for large openings (9μm diameter) for which underetch distance is more important, path factor representing the lateral opening height for species ?EDA Publishing/DTIP 2007 ISBN: 978-2-35500-000-3 Nicolas Abelé, Daniel Grogg, Cyrille Hibert, Fabrice Casset, Pascal Ancey, Adrian M. Ionescu 0-LEVEL VACUUM PACKAGING RT PROCESS FOR MEMS RESONATORS to reach aSi becomes important and then etching ratio decreases to 1.3. 0 1 2 3 4 5 6 1 2 3 4 5 6 7 8 9 10 Hole diameter (um) Un de re tc h r at e ( um /m in) 1.1um aSi 3.3 um aSi Fig. 4 Underetch rate for various releasing holes diameters with amorphous silicon sacrificial layers of 1.1μm and 3.3μm, after 2min. releasing. After release, encapsulation is performed by sputtered deposition of SiO2 under high vacuum of 5x10-7mbar using the intrinsic, non-conformal deposition to clog holes, as shown in Fig. 5. Clogging effect is strongly material dependent and is related to the sticking coefficient that defines probability for a molecule to stick to the surface. The coefficient is below 0.01 for LPCVD Poly-Si but 0.26 for SiO2, therefore being more suitable for clogging purpose. SiO2membrane 2μm Clogging Holeaperture SiO2redeposition Remaining aperture Fig. 5 Schematic of a cross section of the SiO2 membrane clogged by SiO2 sputtering deposition Hole clogging has a strong dependence on the opening aspect ratio as presented in Fig. 6. Holes with diameter- over-height aspect ratio below 1 are clogged for SiO2 thickness of 2μm. Hole with opening ratio of 1.5 could only be clogged for a 3μm thick SiO2 deposition. The hole clogging rate is measured to be 330nm per deposited micron of SiO2. 0 1000 2000 3000 4000 0 1 2 3 Opening aspect ratio Re m ain in g ap er tu re (n m ) 2μm SiO2 Initial SiO2 membrane thickness = 2μm 3μm SiO2 Re ma ini ng ap er tu re (n m) Fig. 6 hole clogging effect depending on the diameter- over-height ratio in the 2μm SiO2 membrane (Right). Remaining aperture diameter (in nm) for 2μm and 3μm SiO2 deposition for hole clogging. The effect of hole geometry on underetch rate and clogging has been studied on square and rectangular holes in Fig.7. Rectangular opening has a quasi identical underetching than square shape of the same opening area, while clogging is 10 times more important. 0 5 10 15 20 25 30 35 0 5 10 15 20 Relasing time (min) Un de re tc h ( um ) 2um 2um x etching direction y etching direction x y x x Fig. 7 Underetch length after 16min release for 29.1μm2 square and rectangle release holes (red dotted rectangles). The initial SiO2 thickness is a 2μm and the thickness of aSi is 1.1μm. Remaining hole size after 2.5μm SiO2 deposition is 1.4μm for the square and 140nm for the rectangle. 4. PACKAGING ISSUES FOR PRODUCTION ENVIRONMENT For industrial production of integrated MEMS, 0-level package has to sustain plastic molding, which corresponds to an isostatic pressure of around 100Bar. Encapsulation film thickness has been designed to lower the impact of the pressure during molding. FEM simulations done with Coventor? in Fig. 8 show that the ?EDA Publishing/DTIP 2007 ISBN: 978-2-35500-000-3 Nicolas Abelé, Daniel Grogg, Cyrille Hibert, Fabrice Casset, Pascal Ancey, Adrian M. Ionescu 0-LEVEL VACUUM PACKAGING RT PROCESS FOR MEMS RESONATORS molding-induced package deflection is reduced to 25nm, having a 4.5μm thick SiO2 film, which makes it compatible with standard industrial back-end processes. 0 1.5 13 19 25 nm Displacement: a) Coventor? 0 0.4 0.8 1.2 1.6 MPa Stress: b) Coventor? Fig. 8 FEM modelling of the packaged resonator under applied isostatic pressure mimicking plastic injection process step. Effect of LTO and PECVD nitride materials on capping deflection under molding stress are presented in Table I. Membrane thickness can then be optimized to lower the molding-induced deflection by considering Young’s modulus and maximum stress before failure of the two materials. Structural layer material LTO Nitride PECVD Film thickness 4.5μm 2.5μm Max. stress before failure 2GPa 9GPa Stress due to molding 1.6MPa 4MPa Molding-induced deflection 25nm 36nm Table I. FEM simulations of the structural layer thickness needed to sustain plastic molding over 0-level packaging composed of a 30μmx30μm membrane. Comparison with PECVD nitride thickness needed to induce the same deflection. On the developed process flow, further investigations on vacuum level and long term stability still to be studied in order to fully characterize the packaging. This characterization can either be done directly by using helium leakage test [9], or indirectly by actuating the packaged resonator for which quality factor is directly related to the vacuum level. 5. CONCLUSION A novel 0-level packaging process was presented using aSi as sacrificial layer and SiO2 as encapsulating layer. RSG-MOSFET resonators have been successfully encapsulated under high vacuum. Impact of back-end-of- line industrial process over the encapsulation has been investigated, resulting in optimal cover thickness needed to sustain plastic molding. Influence of hole dimensions on releasing time and clogging effect for encapsulation were investigated, and optimized packaging parameters are identified for this process. . 11. REFERENCES [1] N. Abelé et al., "Ultra-low voltage MEMS resonator based on RSG-MOSFET ", MEMS ’06, pp. 882-885, 2006 [2] V. Kaajakari et al., "Low noise silicon micromechanical bulk acoustic wave oscillator", IEEE International Ultrasonics Symposium, pp. 1299- 1302, 2005 [3] Y.-W. Lin et al., “Low phase noise array-composite micromechanical wine-glass disk oscillator,” IEDM ’05, pp. 287-290, 2005 [4] N. Sillon et al., Wafer Level Hermetic Packaging for Above-IC RF MEMS: Process and Characterization, IMAPS 2004 [5] B. Kim et al.,, "Frequency Stability of Wafer-Scale Encapsulated MEMS Resonators," Transducers '05, vol. 2, pp. 1965-1968, 2005 [6] V. Kaajakari et al., "Stability of wafer level vacuum encapsulated single-crystal silicon resonators", Sensors and Actuators A: Physical, Vol. 130-131, pp. 42-47, 2006 [7] N. Abelé et al., "Suspended-Gate MOSFET: bringing new MEMS functionality into solid-state MOS transistor ", IEDM ’05, LATE NEWS, pp. 479-481, 2005 [8] S. Frédérico et al.,”Silicon sacrificial layer dry etching (SSLDE) for free-standing RF MEMS architectures”, MEMS ’03, pp. 570- 573, 2003 [9] I. D. Wolf at al., "The Influence of the Package Environment on the Functioning and Reliability of Capacitive RF-MEMS Switches," Microwave Journal, vol. 48, pp. 102-116, 2005. ?EDA Publishing/DTIP 2007 ISBN: 978-2-35500-000-3
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